Diego Nehab
Most Recent Affiliation(s):
- IMPA
Location:
- Rio de Janeiro, Brazil
Learning Category: Jury Member:
Learning Category: Presentation(s):
![Converting Stroked Primitives to Filled Primitives](https://history.siggraph.org/wp-content/uploads/2023/02/2020-Technical-Papers-Nehab_Converting-stroked-primitives-to-filled-primitives-150x150.jpg)
Type: [Technical Papers]
Converting Stroked Primitives to Filled Primitives Presenter(s): [Nehab]
[SIGGRAPH 2020]
![Automating Image Morphing Using Structural Similarity on a Halfway Domain](https://history.siggraph.org/wp-content/uploads/2022/07/2014-SIGGRAPH-Image-Not-Available-150x150.jpg)
Type: [Technical Papers]
Automating Image Morphing Using Structural Similarity on a Halfway Domain Presenter(s): [Liao] [Lima] [Nehab] [Hoppe] [Sander] [Yu]
[SIGGRAPH 2014]
![A system for high-volume acquisition and matching of fresco fragments: reassembling Theran wall paintings](https://history.siggraph.org/wp-content/uploads/2023/03/2008-Technical-Papers-Brown_A-System-for-High-Volume-Acquisition-and-Matching-of-Fresco-Fragments-150x150.jpg)
Type: [Technical Papers]
A system for high-volume acquisition and matching of fresco fragments: reassembling Theran wall paintings Presenter(s): [Brown] [Toler-Franklin] [Nehab] [Burns] [Dobkin] [Vlachopoulos] [Doumas] [Rusinkiewicz] [Weyrich]
[SIGGRAPH 2008]
![Fast triangle reordering for vertex locality and reduced overdraw](https://history.siggraph.org/wp-content/uploads/2023/05/2007-Technical-Papers-Sander_Fast-Triangle-Reordering-for-Vertex-Locality-and-Reduced-Overdraw-150x150.jpg)
Type: [Technical Papers]
Fast triangle reordering for vertex locality and reduced overdraw Presenter(s): [Sander] [Nehab] [Barczak]
[SIGGRAPH 2007]
![The real-time reprojection cache](https://history.siggraph.org/wp-content/uploads/2024/05/2006-Talks-Nehab_The-Real-Time-Reprojection-Cache-150x150.jpg)
Type: [Talks (Sketches)]
The real-time reprojection cache Presenter(s): [Nehab] [Sander] [Isidoro]
[SIGGRAPH 2006]
Learning Category: Moderator:
![AMFS: adaptive multi-frequency shading for future graphics processors](https://history.siggraph.org/wp-content/uploads/2023/02/2014-Technical-Papers-Clarberg_AMFS-Adaptive-Multi-Frequency-Shading-for-Future-Graphics-Processors-150x150.jpg)
Type: [Technical Papers]
AMFS: adaptive multi-frequency shading for future graphics processors Presenter(s): [Clarberg] [Toth] [Hasselgren] [Nilsson] [Akenine-Moller]
[SIGGRAPH 2014]
![Darkroom: compiling high-level image processing code into hardware pipelines](https://history.siggraph.org/wp-content/uploads/2023/02/2014-Technical-Papers-Hegarty_Darkroom-Compiling-High-Level-Image-Processing-Code-into-Hardware-Pipelines-150x150.jpg)
Type: [Technical Papers]
Darkroom: compiling high-level image processing code into hardware pipelines Presenter(s): [Hegarty] [DeVito] [Brunhaver] [Ragan-Kelley] [Bell] [Vasilyev] [Cohen] [Horowitz] [Hanrahan]
[SIGGRAPH 2014]
![Embree: a kernel framework for efficient CPU ray tracing](https://history.siggraph.org/wp-content/uploads/2023/02/2014-Technical-Papers-Wald_Embree-A-Kernel-Framework-for-Efficient-CPU-Ray-Tracing-150x150.jpg)
Type: [Technical Papers]
Embree: a kernel framework for efficient CPU ray tracing Presenter(s): [Wald] [Woop] [Benthin] [Johnson] [Ernst]
[SIGGRAPH 2014]
![Extending the graphics pipeline with adaptive, multi-rate shading](https://history.siggraph.org/wp-content/uploads/2022/07/2014-SIGGRAPH-Image-Not-Available-150x150.jpg)
Type: [Technical Papers]
Extending the graphics pipeline with adaptive, multi-rate shading Presenter(s): [He] [Gu] [Fatahalian]
[SIGGRAPH 2014]
![RayCore: A Ray-Tracing Hardware Architecture for Mobile Devices](https://history.siggraph.org/wp-content/uploads/2022/07/2014-SIGGRAPH-Image-Not-Available-150x150.jpg)
Type: [Technical Papers]
RayCore: A Ray-Tracing Hardware Architecture for Mobile Devices Presenter(s): [Nah] [Kwon] [Kim] [Jeong] [Park] [Han] [Manocha] [Park]
[SIGGRAPH 2014]
![A hardware unit for fast SAH-optimised BVH construction](https://history.siggraph.org/wp-content/uploads/2023/03/2013-Technical-Papers-Doyle_A-Hardware-Unit-for-Fast-SAH-optimised-BVH-Construction-150x150.jpg)
Type: [Technical Papers]
A hardware unit for fast SAH-optimised BVH construction Presenter(s): [Doyle] [Fowler]
[SIGGRAPH 2013]
![A sort-based deferred shading architecture for decoupled sampling](https://history.siggraph.org/wp-content/uploads/2023/03/2013-Technical-Papers-Clarberg_A-Sort-based-Deferred-Shading-Architecture-for-Decoupled-Sampling-150x150.jpg)
Type: [Technical Papers]
A sort-based deferred shading architecture for decoupled sampling Presenter(s): [Clarberg] [Toth] [Munkberg]
[SIGGRAPH 2013]
![Analytic Displacement Mapping Using Hardware Tessellation](https://history.siggraph.org/wp-content/uploads/2022/07/2013-SIGGRAPH-Image-Not-Available-150x150.jpg)
Type: [Technical Papers]
Analytic Displacement Mapping Using Hardware Tessellation Presenter(s): [Nießner] [Loop]
[SIGGRAPH 2013]
![Cardinality-constrained texture filtering](https://history.siggraph.org/wp-content/uploads/2023/03/2013-Technical-Papers-Manson_Cardinality-Constrained-Texture-Filtering-150x150.jpg)
Type: [Technical Papers]
Cardinality-constrained texture filtering Presenter(s): [Manson] [Schaefer]
[SIGGRAPH 2013]
Role(s):
- Talk (Sketch) Presenter
- Technical Paper Moderator
- Technical Paper Presenter
- Technical Papers Jury Member
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