“Triangle order optimization for graphics hardware computation culling” by Nehab, Barczak and Sander
Conference:
Type(s):
Title:
- Triangle order optimization for graphics hardware computation culling
Session/Category Title: Reprise of UIST, I8D, and Sandbox: The Videogame Symposium
Presenter(s)/Author(s):
Abstract:
In Nehab et al. [2006], we describe an automatic preprocessing algorithm that reorders triangles in a mesh so as to enable the graphics hardware to efficiently cull both vertex and pixel processing at rendering time. Our method brings the overdraw rates of a wide range of models close to that of front-to-back order, while preserving state-of-the-art vertex cache performance. This results in higher frame rates for pixel-bound applications with no penalty to vertex-bound applications.
References:
1. Hoppe, H. 1999. Optimization of mesh locality for transparent vertex caching. In Proc. of ACM SIGGRAPH 99, ACM Press, pages 269–276.
2. Nehab, D., Barczak, J., and Sander, P. V. 2006. Triangle order optimization for graphics hardware computation culling. In Proceedings of the ACM SIGGRAPH Symposium on Interactive 3D Graphics and Games, pages 207–211.
3. Sander, P. V., Wood, Z. J., Gortler, S. J., Snyder, J., and Hoppe, H. 2003. Multi-chart geometry images. In Proceedings of the Eurographics/ACM SIGGRAPH Symposium on Geometry processing, Eurographics Association, pages 146–155.
4. Skiena, S. S. 1997. The Algorithm Design Manual. Springer.
