“The SAGE graphics architecture”

  • ©Michael F. Deering and David Naegle

Conference:


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Title:

    The SAGE graphics architecture

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Abstract:


    The Scalable, Advanced Graphics Environment (SAGE) is a new high-end, multi-chip rendering architecture. Each single SAGE board can render in excess of 80 million fully lit, textured, anti-aliased triangles per second. SAGE brings high quality antialiasing filters to video rate hardware for the first time. To achieve this, the concept of a frame buffer is replaced by a fully double-buffered sample buffer of between 1 and 16 non-uniformly placed samples per final output pixel. The video output raster of samples is subject to convolution by a 5×5 programmable reconstruction and bandpass filter that replaces the traditional RAMDAC. The reconstruction filter processes up to 400 samples per output pixel, and supports any radially symmetric filter, including those with negative lobes (full Mitchell-Netravali filter). Each SAGE board comprises four parallel rendering sub-units, and supports up to two video output channels. Multiple SAGE systems can be tiled together to support even higher fill rates, resolutions, and performance.

References:


    1. AKELEY, K. 1993. RealityEngine Graphics. In Proceedings of SIGGRAPH 1993, ACM Press / ACM SIGGRAPH, New York. Kajiya, J., Ed., Computer Graphics Proceedings, Annual Conference Series, ACM, 109-116. Google Scholar
    2. AKELEY, K. 2001. Course notes of CS448A, taught fall semester at Stanford University. URL: http://graphics.stanford.edu/courses/cs448a-01-fall/lectures/lecture5/Google Scholar
    3. COOK, R, CARPENTER, L, and CATMULL, E. 1987. The Reyes Image Rendering Architecture. In Computer Graphics (Proceedings of SIGGRAPH 87), 21 (4) ACM, 95-102. Google Scholar
    4. DEERING, M., WINNER, S., SCHEDIWY, B., DUFFY, C and HUNT, N. 1988. The Triangle Processor and Normal Vector Shader: A VLSI system for High Performance Graphics. In Computer Graphics (Proceedings of SIGGRAPH 88), 22 (4) ACM, 21-30. Google Scholar
    5. DEERING, M., SCHLAPP, S., and LAVELLE, M. 1994. FBRAM: A new Form of Memory Optimized for 3D Graphics. In Proceedings of SIGGRAPH 1994, ACM Press / ACM SIGGRAPH, New York. Glassner, A., Ed., Computer Graphics Proceedings, Annual Conference Series, ACM, 167-174. Google Scholar
    6. DOMINÉ, S. 2001. OpenGL Pixel Formats and Multisample Anti-aliasing. URL: http://developer.nvidia.com/docs/IO/1594/ATT/PixelformatsAndMultisample.pdfGoogle Scholar
    7. EYLES, J., MOLNAR, S., POULTON, J., GREER, T., LASTRA, A., ENGLAND, N., and WESTOVER, L. 1997. PixelFlow: The Realization. ’97 Eurographics/SIGGRAPH Workshop on Graphics Hardware (Los Angeles, CA, Aug 3-4, 1997). Google Scholar
    8. GLASSNER, A. 1995. Principles of Digital Image Synthesis. Morgan Kaufmann. Google Scholar
    9. HAEBERLI, P., and AKELEY, K. 1990. The Accumulation Buffer: Hardware Support for High-Quality Rendering. In Computer Graphics (Proceedings of SIGGRAPH 90), 24 (4) ACM, 309-318. Google Scholar
    10. MITCHELL, D., and NETRAVALI, A. 1988. Reconstruction Filters in Computer Graphics. In Computer Graphics (Proceedings of SIGGRAPH 88), 22 (4) ACM, 221, 228. Google Scholar
    11. MOLNAR, S., COX, M., ELLSWORTH, D., and FUCHS, H. 1994. A Sorting Classification of Parallel Rendering, IEEE Computer Graphics and Applications, July 1994, 23-32. Google Scholar
    12. MONTRYM, J., BAUM, D., DIGNAM, D., and MIGDAL, C. 1997. InfiniteReality: A Real-Time Graphics System. In Proceedings of SIGGRAPH 1997, ACM Press / ACM SIGGRAPH, New York. Whitted, T., Ed., Computer Graphics Proceedings, Annual Conference Series, ACM, 293-302. Google Scholar
    13. STOLL, G., ELDRIDGE, M., PATTERSON, D., WEBB, A., BERMAN, S., LEVY, R., CAYWOOD, C., TAVEIRA, M., HUNT., S., and HANRAHAN, P. 2001. Lightning-2: A High Performance Display Subsystem for PC Clusters. In Proceedings of SIGGRAPH 2001, ACM Press / ACM SIGGRAPH, New York. E. Fume, Ed., Computer Graphics Proceedings, Annual Conference Series, ACM, 141-148. Google Scholar
    14. TAROLLI, G.1999. Real-Time Cinematic Effects on the PC: The 3Dfx T-Buffer. Hot 3D presentation in Eurographics/SIGGRAPH Workshop on Graphics Hardware 1999, IEEE Press.Google Scholar
    15. TREMBLAY, M., CHAN, J., CHAUDHRY, S., CONIGLIARO, A., TSE, S. S., 2000. The MAJC Architecture; A Synthesis of Parallelism and Scalability. IEEE Micro Mag. Nov/Dec 2000, Vol 20, 12-25. Google Scholar
    16. UPSTILL, S. 1990. The RenderMan Companion. Addison-Wesley.Google Scholar
    17. WINNER, S., KELLY, M., PEASE, B., RIVARD, B., and YEN, Y. 1997. Hardware Accelerated Rendering Of Antialiasing Using A Modified A-buffer Algorithm. In Proceedings of SIGGRAPH 1997, ACM Press / ACM SIGGRAPH, New York. Whitted, T., Ed., Computer Graphics Proceedings, Annual Conference Series, ACM, 307-316. Google Scholar


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