“A frame buffer system with enhanced functionality” by Crow and Howard

  • ©Franklin (Frank) C. Crow and M. Howard

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Title:

    A frame buffer system with enhanced functionality

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Abstract:


    A video-resolution frame buffer system with 32 bits per pixel is described. The system includes, in addition to standard features for limited zoom and pan, an arithmetic unit at the update port which allows local computation of many frequently-used pixel-level functions combining stored pixel values with incoming pixel values. In addition to the standard arithmetic and logical functions there are functions for sum to maximum pixel value and difference to minimum pixel value. Comparisons between incoming and stored data are used to implement conditional writes based on depth values for depth-buffer algorithms. Update and refresh ports are designed for a wide range of flexibility allowing simultaneous use by separate tasks and various functional rearrangements of the 32-bit pixel words. The memory architecture, refresh and update ports are described. Examples of widely divergent modes of operation are provided.

References:


    1. Akland, B. and Weste, N., “Real-Time Animation Playback on a Frame Store Display System,” Computer Graphics Vol. 14 (3) SIGGRAPH-ACM, (July 1980)
    2. Fuchs, Henry and Johnson, B., “An Expandable Architecture for Video Graphics,” Proceedings of the Sixth Symposium on Computer Architecture, (April 1979).
    3. Crow, Franklin C., “The Use of Grayscale for Improved Raster Display of Vectors and Characters,” Computer Graphics Vol. 12 (2) SIGGRAPH-ACM, (July 1978).
    4. Crow, Franklin C., “An Approach to Real-Time Scan Conversion,” Proceedings of the National Computer Conference, (June 1979).
    5. Jackson, J.H., “Dynamic Scan-Converted Images with a Frame Buffer Display Device,” Computer Graphics Vol. 14 (3) SIGGRAPH-ACM, (july 1980).
    6. Kajiya, James T., Sutherland, Ivan E., and Cheadle, Edward C., “A Random-Access Video Frame Buffer,” Proceedings of the Conference on Computer Graphics, Pattern Recognition and Data Structures, IEEE Catalog No. 75CH0981-1C, (May 1975).
    7. Kolb, William W., A Real-Time Raster Scan Conversion Processor, University of Texas, Austin, Texas (August 1980). Masters Thesis.
    8. Parke, Frederick I., “Simulation and Expected Performance Analysis of Multiple Processor Z-Buffer Systems,” Computer Graphics Vol. 14 (3) SIGGRAPH-ACM, (July 1980).
    9. Shoup, Richard G., “Color Table Animation”, Computer Graphics Vol. 13 (2) SIGGRAPH-ACM, (August 1979).


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