“Single pass depth peeling via CUDA rasterizer”
Conference:
Type(s):
Title:
- Single pass depth peeling via CUDA rasterizer
Session/Category Title: Rendering and Visualization
Presenter(s)/Author(s):
Abstract:
Multi-fragment effects play important roles on many graphics applications, which require operations on more than one fragment per pixel. The classical depth peeling algorithm [Everitt 2001] peels off one layer each pass, but the performance degrades for large scenes. We prefer to capture multiple fragments in a single pass, which is difficult because the fragments generated in graphics pipeline are not allowed to be scattered to arbitrary positions of the buffers. Compute unified device architecture (CUDA) [NVIDIA 2008] provides more flexible control over the GPU memory, but accessing of the fragments generated by graphics pipeline is not yet supported. In this work we design a CUDA rasterizer so that many graphics applications can benefit from the free control of GPU memory, especially for the multi-fragment effects. We present two efficient schemes to capture and sort multiple fragments per pixel in a single geometry pass via the atomic operations of CUDA without read-modify-write (RMW) hazards. Experimental results show significant speedup to classical depth peeling, especially for large scenes.
References:
1. Carpenter, L. 1984. The a-buffer, an antialiased hidden surface method. In Proceedings of the 11th annual conference on Computer graphics and interactive techniques, 103–108.
2. Everitt, C. 2001. Interactive order-independent transparency. Tech. rep., NVIDIA Corporation.
3. Myers, K., and Bavoil, L. 2007. Stencil routed a-buffer. ACM SIGGRAPH 2007 Technical Sketch Program.
4. NVIDIA. 2008. Nvidia cuda: Compute unified device architecture.
