“A rectangular area filling display system architecture” by Whelan

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Title:

    A rectangular area filling display system architecture

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Abstract:


    A display system architecture which has rectangular area filling as its primitive operation is presented. It is shown that lines can be drawn significantly faster with this architecture than with a pixel display system. The rendition of filled boxes is also faster showing an O(n2) speed improvement. Furthermore filled polygons can be rendered with an O(n) speed improvement. The design and implementation of this rectangular area filling architecture are discussed and refined. A custom VLSI integrated circuit is currently being designed to implement this rectangular area filling architecture and at the same time reduce the display memory system video refresh bandwidth requirements.

References:


    1. Bresenham, J.E. “Algorithm for computer control of a digital plotter” IBM Systems Journal, Vol. 4, No. 1, 1965, pp. 25-30.
    2. Clark, J.H. “Structuring a VLSI System Architecture” LAMBDA, Vol. 1, No. 2, 1980, pp. 25-30.
    3. Henry Fuchs and John Poulton “PIXEL-PLANES: A VLSI-Oriented Design for a Raster Graphics Engine” VLSI Design, Vol. 2, No. 3, 1981, pp. 20-28.
    4. Satish Gupta, Robert F. Sproull and Ivan E. Sutherland “A VLSI Architecture for Updating Raster-Scan Displays” Computer Graphics, Vol. 15, No. 3, 1981, pp. 71-78.
    5. Bart Locanthi “Object Oriented Raster Displays” Proceedings of Caltech Conference on Very Large Scale Integration, 1979, pp. 215-225.
    6. Takashi Ohzone, Juro Yasui, Takeshi Ishihara and Shiro Horiuchi “An 8K×8 Bit Static MOS RAM Fabricated by n-MOS/n-Well CMOS Technology” IEEE Journal of Solid-State Circuits, Vol. SC-15, No. 5, October 1980, pp. 854-861.
    7. Toshio Wada, Hiroshi Yamanaka, Mitsuru Sakamoto, Hirohiko Yamamoto and Shigeki Matsue “A 16 DIP, 64 kbit, Static MOS-RAM” IEEE Journal of Solid-State Circuits, Vol. SC-16, No. 5, October 1981, pp. 488-491.
    8. Gary S. Watkins “A real-time visible surface algorithm” University of Utah Computer Science Department UTECH-CSc-70-101, June 1970.


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